Each row is activated one at a time until a column is found active. All eight keypad pins inject signals into port pins configured as input pins. The active key connects a port pin to common ground on the keypad. The keypad contains logic, which actively generates a 4-bit code for every key. |
Ease of programming Limited to display numbers and a few characters Ability to display numbers, characters, and graphics Declining prices |
| Question 3. 3. (TCO 1) For the LCD, describe the function accomplished with the R/W~ control signal. Also, indicate whether this signal is an LCD input or LCD output. (Points : 10)
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| Question 4. 4. (TCO 1) In the standard set-up of a keypad, the four rows are connected to 9S12G128 output ports, and the four columns are connected to input ports with internal pull up resistors enabled. In your own words, describe how the scanning program determines which key is pressed. (Points : 10)
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| Question 5. 5. (TCO 1) What are the advantages and disadvantages of using 4-bit data lengths to interface the 9S12G128 with an LCD? (Points : 10)
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I = 0, X = 0 I = 0, X = 1 I = 1, X = 0 I = 1, X = 1 |
Falling edge Logic LOW Rising edge Depends on the initialization of the external interrupt |
ISR location interrupt address interrupt vector interrupt enable |
| Question 9. 9. (TCO 2) In your own words, explain why a programmer uses a cli instruction in an ISR.(Points : 10)
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Input capture Output capture Output compare Pulse-width modulation |
0x0011 0x0010 33 16.5 |
| Question 2. 2. (TCO 4) In your own words, describe why DACs use the R-2R ladder configuration instead of a binary ladder. (Points : 10)
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4.82 µV 4.82 mV 19.5 mV 48.2 µV |
0000 0110 0000 0101 0000 0010 0101 1101 0010 0101 1101 0000 1001 0111 0100 0000 |
Dual-slope Flash Successive approximation Sigma-delta |
A CMOS to TTL converter A TTL to CMOS converter A TTL to RS232 level shifter A RS232 to TTL level shifter |
| Question 7. 7. (TCO 5) A transducer has a device signal range of 0 V to 1.25 V. The ADC input signal range is 0 V to 5 V. Describe the signal conditioning circuit that is needed to use the full-scale range of the ADC. (Points : 10)
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6 bits 7 bits 8 bits 10 bits |
9600 4800 2400 1800 |
| Question 10. 10. (TCOs 7 and 8) In programming for readability, what is meant by prologue for the main? Provide an example that includes the key elements. (Points : 15) |
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A rising edge followed by a falling edge A falling edge followed by a rising edge A rising edge followed by a rising edge A falling edge followed by a falling edge |
Concatenation Combination Concurrency Connectivity |
| Question 3. 3. (TCO 3) If an event is captured at a reading of 0x72AC, and the next event is captured at a reading of 0xAA4F, how much time has elapsed between the two events? The E-clock is 24 MHz.(Points : 10)
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8 10 12 14 |
0.00024% 0.00048% 0.024% 0.12% |
